Stochastic testing of processing cores in a many-core architecture

Abstract

A promising solution to reliability challenges in nano-scale fabrication technologies is self-test and reconfiguration. In this direction, we propose an autonomous test mechanism for online detection of permanent faults in many-core processors. Several hardware test components are incorporated in the many-core architecture. Some of these components distribute software-based self-test routines among the processing cores and make each test routine accessible for a limited amount of time. A processing core that has an idle slot executes the test routine, otherwise it skips it without loss of test continuity. Several components of the proposed test architecture monitor behavior of the processing cores during execution of test routines, detect faulty cores, and make their omission from the system possible. We propose the use of an extended form of Petri NET modeling method to model and analyze the proposed test mechanism and tune our test architecture to preserve quality of test, and at the same time, manage the overall test time. Our experimental results show that test time and hardware overhead of the proposed test mechanism are low and its performance overhead is zero. Furthermore, the proposed test architecture can efficiently scale to a many-core with a large number of processing cores.