Abstract
Modular dc/dc converter (MDCC) based on cascaded submodules (SMs) has been an attractive converter topology for the interconnection of high-voltage dc (HVDC) grids for its low cost and high efficiency. The MDCC with sine-wave modulation has been developed and poses satisfactory performance; however, the high-frequency sorting of SM capacitor voltages, which aims to achieve their balance, results in quite large computation burden in HVDC application. To resolve the problem, the stepped two-level operation of the MDCC is proposed in this paper. Compared with the traditional sine-wave modulation, the stepped two-level modulation offers the following merits: 1) smaller SM capacitance requirement; 2) smaller ac circulating current; 3) the switching frequency is equal to the fundamental frequency, which avoids the extra switching actions existing in the sine-wave modulation; and 4) the sorting algorithm of the SM capacitor voltages needs only to be executed twice in a period, which poses a significant reduction of the computation burden, especially for ultrahigh voltage power conversion requiring hundreds of SMs. The simulation and experimental results verify the theoretical analysis.
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