STELLaR - A case-study on SysTEmaticaLLy embedding a Traffic Light Recognition

Abstract

In this paper the authors present an embedded implementation of a Traffic Light Recognition (TLR) on a low-cost FPGA device with low memory usage. The authors follow a systematic approach where the authors thoroughly investigate computational hot-spots, and systematically partition the system into hardware and software components which the authors both optimize. The authors implementation is evaluated using an actual FPGA board as Hardware-in-the-Loop (HIL). In contrast to other approaches, the authors are not restricted to filled lights but also detect other types such as arrows, pedestrians or bicycle ones when provided with training data. With an average performance of 45 fps and minimum 12 fps with ~ 5 Watts of power consumption, the authors system shows real-time behavior even on high-definition video data with high comparable recognition rates while still obeying automotive constraints such as low power. As far as the authors know, the authors are the first ones presenting an embedded TLR solution.