Steep subthreshold slope “Dual-gate PN-body tied SOI-FET” – First fabrication results –

Abstract

In this study, we report the first fabrication results of the steep subthreshold slope new type “dual-gate PN-body tied silicon on insulator field effect transistor (DG PNBT SOI-FET).” It simultaneously shows no hysteresis and a big Ion/Ioff ratio and also resolves the small leakage current during turn-off, which is one of the problems on “PNBT SOI-FET,” we have already reported many data on it. The results indicate that DG PNBT SOI-FET will be the more suitable candidate for the steep slope device for future ultra-low power Internet-of-things (IoT) applications.