Abstract

The statistical distribution of negative bias temperature instability (NBTI) in deca-nanometer p-channel FETs is discussed. An exponential distribution of threshold voltage shifts due to a single charge trapped in the gate oxide is observed, resulting in single-charge shifts exceeding 30 mV in some of the studied 35-nm-long and 90-nm-wide devices. The exponential distribution is justified with a simple channel percolation model. Combined with the assumption of the Poisson-distributed number of trapped gate oxide charges, an analytical description of the total NBTI threshold voltage shift distribution is derived. This allows, among other things, linking its first two moments with the average number of defects per device, which is found < 10 in the studied devices.

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