Statistical optimization and manufacturing sensitivity analysis of 0.18 μm SOI MOSFETs

Abstract

A comprehensive approach based on TCAD and statistical methods has been demonstrated for deep submicron SOI CMOS process optimization and manufacturing sensitivity analysis. Second-order response surface models were fitted to ten device characteristics based on 15 processing conditions identified as significantly affecting the CMOS process. The optimized 0.18 μm SOI CMOS process, representative of deep submicron SOI technology currently under consideration by industry, was determined by numerical analysis of the generated models. A two part sensitivity analysis was then conducted for the optimized process. A Monte Carlo analysis technique was applied to a set of reduced response models to determine the sensitivity of the device characteristics to some anticipated manufacturing process random variations. Results for a 0.18 μm PD SOI CMOS technology are presented, providing optimized process conditions meeting desired device performance measures, and indicating no conspicuous device performance degradation by anticipated manufacturing process variations.