Statistical modeling tools, methods and applications for integrated circuit manufacturability

Abstract

A description of various statistical modeling methods is provided. The analysis methods are discussed to remove the confusion in the existing literature. Statistical models are generated using factor analytic technique for SPICE level 3 on a 0.8 micron LDD CMOS. It is shown that our measurement based approach accurately predicts the device performance. We show that the existence of a physical MOS model is not a necessary pre-requisite to perform statistical modeling. Our approach provides models that are suitable for both analog and digital designs and promises to make statistical modeling feasible for general use.