Statistical methods for estimating variance components for integrated circuits device parameters

Abstract

Statistical sampling theory is applied to the estimation of parameter values in the manufacturing of integrated circuits. In addition, another statistical technique, variance component estimation, is used to separate total parameter variability into the sampling level components representing differences between lots, wafers within lots and within wafers. Finally, a combination of variance component estimation and multiple regression is demonstrated which allows separation of variability, not only as just described, but also identification of the contribution to the variability made by previous steps in the manufacturing process. To illustrate these techniques, an example containing data obtained during patterning of device contact windows is presented. The variability of contact window diameters is analyzed in terms of contributions to variability at each sampling level, as well as due to the processing components of masks, exposure/development/baking and window etching, at each of these sampling levels. For the example presented, it was shown that lot to lot and mask to mask differences are the main sources of variability.