Abstract

In Cyber-Physical-Social Systems (CPSS), large-scale data are continually generated from edge computing devices in our daily lives. These heterogeneous data collected from CPSS are urgently needed to be processed efficiently with low power consumption. Hybrid cache based edge computing can accelerate the computing speed for the edge devices. Hybrid cache consisting of spin-transfer torque RAM (STT-RAM) and static RAM (SRAM) has been proposed as last level cache (LLC) for energy efficiency recently in CPSS. However, the write operations on STT-RAM suffer from considerably higher energy consumption as well as longer latency than SRAM, the proper allocation of data blocks has a significant effect on both energy consumption and performance in the hybrid cache. So it is very useful to adjust the data allocation for the asymmetric-access in hybrid cache. To enhance the performance of hybrid cache, this paper proposes a novel statistical behavior guided block allocation (SBOA) scheme to process CPSS data. The key idea is to estimate the cache block characteristics based on the statistical behavior of data read/write re-references. We design a theoretical analysis model to optimize the energy consumption and guide block allocation in both SRAM region and STT-RAM region. Experimental results demonstrate that the proposed scheme reduces the dynamic energy consumption by 18.5%, and reduces execution time by 7.4% on average compared to the baseline with negligible overhead.

Highlights

  • As the rapid development of the Internet of Things (IoT), the cyber, physical, and social worlds are integrated together

  • STUDY This section first introduces the fundamentals of spin-transfer torque RAM (STT-RAM) and hybrid cache, we present the preliminary study of this work

  • EVALUATION we evaluate the effectiveness of the proposed statistical behavior guided block allocation (SBOA) scheme

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Summary

Introduction

As the rapid development of the Internet of Things (IoT), the cyber, physical, and social worlds are integrated together. It is referred as Cyber-Physical-Social Systems (CPSS) [1]–[3]. Traditional SRAM-based LLC encounters many challenges such as the high leakage power and poor scalability [8]– [10]. To address these issues, various emerging non-volatile memory technologies have been extensively studied recently. Compared to SRAM, STT-RAM has attractive features including better scalability, lower leakage power and higher storage density [8]. A. STT-RAM AND HYBRID CACHE OVERVIEW The basic storage element in STT-RAM is magnetic tunnel junction (MTJ). A low current is enough to read the MTJ state, while a high current is required to change the magnetic state, which involves long write latency and high write energy consumption [8], [17]

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