Static analysis of a resistor‐load‐type D2 CMOS (dual depletion CMOS) associative memory cell by using the state diagram method

Abstract

AbstractIn addition to functions required for conventional RAM cells, an associative memory cell requires a function for interrogating its input information and memory information. These requirements increase the number of components per bit, and create the problem of increased cell area when the components are integrated. This paper proposes a new associative memory cell using dual depletion CMOS (D2 CMOS) devices which have fewer components per bit than conventional associative memory cells so that they are more suitable for an integration. By using “the state diagram method,” the static characteristics of the cell were analyzed. The conditional equations of the load resistance which makes the cell functional as an associative memory were obtained and the memory characteristics examined. The writing characteristics involving the conditions for the shift of a state and the writing voltage also were analyzed. In addition, the reading characteristics and the interrogating characteristics were examined. The results of the analyses agree fairly well with the results of the simulation using the circuit analysis programme SPICE 2.