Stateful Three-Input Logic with Memristive Switches

A Siemon,J S Friedman,D Querlioz,X Hu,A Heittmann,M J Schultis,R Waser,S Menzel,E Linn,R Drabinski

doi:10.1038/s41598-019-51039-6

Abstract

Memristive switches are able to act as both storage and computing elements, which make them an excellent candidate for beyond-CMOS computing. In this paper, multi-input memristive switch logic is proposed, which enables the function X OR (Y NOR Z) to be performed in a single-step with three memristive switches. This ORNOR logic gate increases the capabilities of memristive switches, improving the overall system efficiency of a memristive switch-based computing architecture. Additionally, a computing system architecture and clocking scheme are proposed to further utilize memristive switching for computation. The system architecture is based on a design where multiple computational function blocks are interconnected and controlled by a master clock that synchronizes system data processing and transfer. The clocking steps to perform a full adder with the ORNOR gate are presented along with simulation results using a physics-based model. The full adder function block is integrated into the system architecture to realize a 64-bit full adder, which is also demonstrated through simulation.

Highlights

The ever-increasing density of transistors in integrated circuits has spurred a revolution of engineering and technology over the last 50 years
A memristive device can be switched by appropriate voltage stimuli between at least two different resistance states: a high resistive state (HRS) and a low resistive state (LRS)[14,15]
The voltage across device X is equal to VSet, which is www.nature.com/scientificreports sufficiently large to change the state of X from the HRS to the LRS

Summary

Introduction

The ever-increasing density of transistors in integrated circuits has spurred a revolution of engineering and technology over the last 50 years. Von Neumann architectures have fundamental speed and power limitations resulting from the continual transfer of data between the processor and memory[4]. This so-called “von Neumann bottleneck” can be avoided if the information required computing an operation is already present within or near the processing unit[5,6,7,8]. Memristive switches have been proposed as building blocks for beyond CMOS computing devices in von Neumann architectures due to their ultrahigh scalability[17,18,19,20,21]. The MAGIC and IMPLY logic families use only the device resistance as inputs and output and are stateful logic families

Methods

Results

Discussion

Conclusion