Stacked Assembly of SiC Cascode Using Buried Gate Static Induction Transistor

Abstract

A 650-V and 10-A silicon carbide (SiC) stacked cascode assembly has been proposed and demonstrated, in which a low-voltage Si-MOSFET (LV Si-MOSFET) is stacked on a high-voltage SiC buried gate static induction transistor (HV SiC-BGSIT). This is achieved by mounting Al bumps on the source pad of the HV SiC-BGSIT die and inserting a stacked Ag paste/epoxy layer between the HV SiC-BGSIT die and LV Si-MOSFET die. The epoxy layer is used to electrically separate the wire bonded on the gate pad of the HV SiC-BGSIT from the bottom electrode of the LV Si-MOSFET. The results of the measured static characteristics at temperatures from room temperature to 400 K and hard switching characteristics at room temperature of the fabricated stacked cascode sample verify that the proposed stacked cascode assembly successfully performs as a SiC cascode switching device. Thus, the proposed assembly contributes to the reduction in the footprint and parasitics for the conventional discrete packages and modules using the SiC cascode configuration.