Abstract
In a modular multilevel converter (MMC) working as a rectifier, digital controllers are widely adopted and usually have three control loops: an inner ac current loop, an outer dc voltage loop, and a circulating current suppression loop. The main design constraint on these control loops is the control delay, which may cause system instability. A few previous papers have analyzed this issue, but only MMC inverter with circulating current proportional integral (PI) control was investigated. In this paper, the generation mechanism of control delay in each control loop of an MMC rectifier is analyzed. Small-signal loop gain models for all the three loops are developed. Based on the control loop models, design cases are examined, and a delay compensation scheme is implemented as an example. Both simulations and experiments validate the effectiveness of the analytical models.
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