SSDC SiC Mosfet Panel Warpage Challenges at Sintering Process

Abstract

Direct bond copper (DBC) is a widely used substrate for power module packaging. However, emerging technology shows that to achieve a higher thermal conductivity and thermal cycling performance in the substrate the combination of Active Metal Brazing (AMB) process and Si3N4 (Silicon nitride) ceramic offers a better option especially on high power module packages using Silicon Carbide die. Single side direct cooling (SSDC) using 900V SiC MOSFET is part of onsemi family of highly integrated power modules for Hybrid (HEV) and Electric Vehicle (EV) traction inverter application. To support the SiC MOSFET performance and achieve reliability requirements, the team decided to use high performance Si3N4 ceramic that uses AMB technology to form the substrate and Ag sintering for die attach. However, applying pressure with high temperature results to high panel warpage after sintering process. This paper discusses about the challenges and solutions of SSDC SiC MOSFET AMB panel warpage after sintering process that can serve as a guide for future characterization studies of similar packages.