Splitter Trees in Single Flux Quantum Circuits

Abstract

The increasing complexity of modern rapid single flux quantum (RSFQ) circuits has made the issue of multiple fanout of growing importance. Most RSFQ gates can only drive a single output. Splitter gates can however distribute an SFQ pulse to multiple fanout. To drive N SFQ gates, N-1 splitters with a fanout of two are required. Large splitter trees are often used in high speed VLSI complexity SFQ systems. These splitters require significant area and increase the path delay. In this paper, three area and power efficient splitter topologies for large scale RSFQ circuits are introduced. These SFQ splitters are an active splitter tree with fewer JJs, a passive splitter, and a multi-output active splitter. A methodology is presented for determining when to use passive or active splitters. Tradeoffs among the number of JJs, bias current of each stage, and delay are reported along with a margin analysis. The proposed splitters greatly reduce the required bias currents and delay of large scale RSFQ circuits by enabling multiple fanout. The methodologies and techniques are applicable to automated layout and clock tree synthesis for large scale SFQ integrated circuits.