Abstract
A split-gate-enhanced power UMOSFET integrated with Schottky element is studied. In this device, a Schottky rectifier is integrated into every unit cell of the split-gate-enhanced UMOSFET (SGE-UMOS). 2-D simulations show that the device can achieve a low forward voltage drop of 0.48 V, around 28% lower than the 0.78 V of an SGE-UMOS. Numerical simulation also shows a 38% reduction in the reverse recovery time and three times improvement in the softness factor at a breakdown voltage (BV) of 150 V when compared with SGE-UMOS at room temperature. By reducing the width of the Schottky rectifier electrode, a further reduction in the leakage current until approaching the SGE-UMOS can be obtained. The unclamped inductive switching and the reverse recovery characteristics at an elevated temperature of 400 K, and the ON-state and OFF-state BV versus temperature are also studied.
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