Abstract

In the context of the High-Luminosity (HL) upgrade of the LHC, many custom ATCA electronics boards are being designed containing heterogeneous System-on-Chip (SoC) devices, more specifically the Xilinx Zynq UltraScale+ (ZUS+) family. While the application varies greatly, these devices are regularly used for performing board management tasks, making them a fundamental element in the correct operation of the board. The large number of hundreds of SoC devices creates significant challenges in their firmware deployment, maintenance, and accessibility. Even though U-Boot on ZUS+ devices supports network boot through the Preboot Execution Environment (PXE), the standard ZUS+ boot process contains application-specific information at earlier boot steps, particularly within the First Stage Bootloader (FSBL). This prevents the initialization of several devices from a universal image. Inspired by the PXE boot process on desktop PCs, this paper describes split boot, a novel boot method tailored to the specific needs of the ZUS+. All application-specific configuration is moved to a network storage device and automatically fetched during the boot process. We considered the entire process, from firmware and software development to binary distribution in a large-scale system. The developed method nicely integrates with the standard Xilinx development toolset workflow.

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