Abstract
The SPIRE-Architecture is designed for high speed uniprocessor execution of sequential problems as well for parallel multiprocessor systems where individual processors perform operations on complex data structures. The idea of SPIRE-Architecture lies in a new instruction format expanded by a dedicated execution clause and compilative instruction execution. To mirror this concept in practice some new components has been added to the hardware.The simulation results show that SPIRE can processes data up to 30 times faster than classic von Neumann processor and profits directly from complexity of used data structures. Programm code is about twice as compact as that of RISC processors. Furthermore, a proposed hardware concept and consistent rules of instruction coding allows compilers to generate very efficient code.
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