Abstract

In this article, a neural spin-orbit torque (NSOT)-based emerging device technology reconfigurable fabric is developed and assessed as a low-leakage power alternative to the use of a static random access memory (SRAM)-based lookup table (LUT). While other recent designs have explored utilizing spintronic devices as a digital memory cell to replace SRAM-based configuration memory in field programmable gate arrays (FPGAs), the NSOT-LUT fabric exploits small, modularized, and validated artificial neural networks (ANNs) together with the behavior intrinsic of spintronic devices to directly implement novel configuration memory and logic realizations wholly within each LUT. Herein, the NSOT-LUT approach is evaluated within an island-style reconfigurable fabric and then optimized for energy-sparing operation, throughput, and routability. Realization in 45-nm technology is modeled with the Berkeley predictive technology model (BPTM) for CMOS devices and interconnects. Results indicate that the proposed NSOT-LUT fabric can achieve approximately sixfold area savings, twofold speedup, and twofold power savings for a set of 12 benchmark circuits, when compared to an island-style baseline FPGA using spintronic configuration memory.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call