Spin accumulation and transport signals in CoFe/MgO/Si devices with confined structure of n+-Si layer

Y Saito,H Sugiyama,M Ishikawa,T Ajay,T Inokuchi

doi:10.1063/1.4978583

Abstract

Observation of the spin signals in devices with low interface resistance of ferromagnetic/semiconductor junctions is one of the most important issues from the application view point. We demonstrate spin transport and accumulation signals in highly doped ∼1×1020 cm-3 n+-Si by using CoFe/MgO/n+-Si (10 nm, 20 nm)/n-Si devices. The highly doped n+-Si was confined within a thin n+-Si layer (10 nm and 20 nm in thickness). In this confined structure, we observed the spin accumulation signals for the devices with impurity concentration of ∼1×1020 cm-3 and the spin transport signals for the devices with ∼1 kΩμm2 interface resistance. This indicates that the n+ confined structure is important for observing and increasing spin signals in the low-interface-resistance region.

Highlights

Spin metal-oxide-semiconductor field-effect transistors[1,2] whose source and drain electrodes consist of ferromagnetic materials are expected to lead to a new logic-in-memory architecture
Room-temperature electrical spin injection, transport and detection have been realized in F/S junctions with the interface resistance (RA) of ≥10 kΩ μm[2] and the impurity concentration of ≤5×1019 cm-3.3–6,12 We have been observing spin signals in Si with relatively long spin relaxation time by measuring three- and four-terminal Hanle signals at room temperature;[4,7,8,9,10,11,13,14,15] we did not succeed in observing spin signals for F/S junctions with n >5×1019 cm-3 and RA
It is possible to pass a current between E1 and E3 electrodes in the high-temperature (≥100 K) region; the spins can diffuse in the n-Si in the high-temperature region

Summary

Introduction

Spin metal-oxide-semiconductor field-effect transistors (spin-FETs)[1,2] whose source and drain electrodes consist of ferromagnetic materials are expected to lead to a new logic-in-memory architecture. Many studies of silicon (Si) spintronics for realizing spin-FETs have been reported recently in which room-temperature spin signals were observed in Si.[3,4,5,6,7,8,9] We have been observing spin accumulation signals in Si with relatively long spin relaxation time by measuring three-terminal and nonlocal (NL) four-terminal Hanle signals for CoFe/MgO/n+-Si(100) devices,[4,7,8,9,10,11] and observing local magnetoresistance (MR) and NL-MR signals up to room temperature.[9] in order to realize the spin-MOSFETs, it is necessary to realize efficient spin injection and detection into Si for the Ferromagnet/Semiconductor (F/S) junctions with low interface resistance, which permits design of a low-power-consumption transistor with large current on/off ratio. The highly doped n+-Si (nimp ∼1×1020 cm-3) was confined within a thin n+-Si layer structure (10 nm and 20 nm in thickness)

Methods

Results

Conclusion