Abstract

We have implemented a Spiking Neural Network (SNN) architecture using a combination of spin orbit torque driven domain wall devices and transistor based peripheral circuits as both synapses and neurons. Learning in the SNN hardware is achieved both under completely unsupervised mode and partially supervised mode through mechanisms, incorporated in our spintronic synapses and neurons, that have biological plausibility, e.g., Spike Time Dependent Plasticity (STDP) and homoeostasis. High classification accuracy is obtained on the popular Iris dataset for both modes of learning.

Highlights

  • Implementing Neural Network (NN) algorithms in specialized neuromorphic hardware, including spintronic hardware, has been a heavily pursued topic of research in recent years.1–9 Spiking Neural Network (SNN) algorithms are of particular interest in this regard

  • We have showed Spike Time Dependent Plasticity (STDP) and homoeostasis enabled learning in our designed SNN

  • Our choice of Leaky Integrate Fire (LIF) parameters is such that the time between two consecutive spikes of the neuron is in the order of the time constant of the STDP synapse (1.5 μs) and several orders higher than duration of the “write” current pulse into the DOMAIN WALL (DW) synapse, which is same as the duration of each spike in our designed SNN (3 ns)

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Summary

INTRODUCTION

Implementing Neural Network (NN) algorithms in specialized neuromorphic hardware, including spintronic hardware, has been a heavily pursued topic of research in recent years. Spiking Neural Network (SNN) algorithms are of particular interest in this regard. When post-neuron spikes at tpost (sharp rise in gate voltage of transistor T4 turning on T4 - Fig. 5(b)), since T3 is designed to operate in sub-threshold region, drain current through T3 and T4 (Iwrite,1) is proportional to e−(. Our choice of LIF parameters is such that the time between two consecutive spikes of the neuron is in the order of the time constant of the STDP synapse (1.5 μs) and several orders higher than duration of the “write” current pulse into the DW synapse, which is same as the duration of each spike in our designed SNN (3 ns) This is a requirement for STDP based learning to work (Fig. 5, Fig. 6).

DESIGN OF SNN AND TRAINING ON IRIS DATASET
Findings
CONCLUSION
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