Speeding up an integer-N PLL by controlling the loop filter charge

Abstract

This paper studies a group of methods designed to speed-up the frequency step response of integer-N phase-locked loops (PLLs). The methods are based on current signals connected to the loop filter. Optimal speed-up waveforms are found mathematically using a linear PLL model. The paper also discusses problems associated with this theoretical waveform and introduces a considerably simpler waveform based on the use of two current pulses. This method uses excess output frequency to quickly cancel the accumulated phase error. In order to accelerate the decay of the phase error, the PLL is first overdriven at the beginning of the frequency transition with an external charge pulse to the loop filter. As the phase error goes rapidly to zero, the frequency error is also reduced to zero by another charge pulse. The theory presented here is verified by measurements using a practical RF synthesizer.