Speculative Predication Across Arbitrary Interprocedural Control Flow

Abstract

The next generation of microprocessors, particularly IA64, will incorporate hardware mechanisms for instruction-level predication in support of speculative parallel execution. However, the compiler technology proposed in support of this speculation is incapable of speculating across loops or procedural boundaries (function call and return). In this paper, we describe compiler technology that can support instruction-level speculation across arbitrary control flow and procedural boundaries. Our approach is based on the concept of converting a conventional control flow graph into a meta state graph in which each meta state represents a set of original states speculatively executed together.