Abstract
High-speed brushless dc (BLDC) drives usually operate with low carrier-fundamental frequency ratio, which causes abundant sideband harmonic current components. Some sideband harmonics will be induced in low-frequency range, leading to low-frequency current oscillations and low-frequency torque ripples. To minimize these undesired sideband harmonics, a novel pulsewidth modulation commutation pattern, i.e., carrier-synchronized commutation (CSC), is proposed in this article. For comparison, two conventional commutation patterns, including regular-sampled commutation (RSC), and natural-sampled commutation (NSC), are analyzed. To reveal the characteristics of sideband harmonics caused by RSC and NSC patterns, an extended geometric wall model is introduced, which can be used for the Fourier decomposition of complex vectors. Theoretical, simulation, and experimental results demonstrate the conventional RSC and NSC patterns will produce additional sideband harmonic currents and torque ripples, while the proposed CSC pattern can considerably suppress these adverse influences and meanwhile presents high performance and robustness.
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