Spatially resolved characterization of ARC films on multicrystalline silicon with a non-contact surface voltage technique

Abstract

Novel spatially resolved corona charge-voltage characterization of SiN x ARC films on multi-crystalline silicon demonstrates significant grain-to-grain differences in surface voltage and low field dielectric leakage. Kelvin-probe surface voltage line scanning and mapping after corona charging enables visualization of leakage related properties and delineation of different regions. In-depth characterization is then performed on selected sites using point source corona charging and time resolved surface voltage. The current-voltage characteristics reveal striking orders of magnitude differences in low field leakage current. It is interpreted as the effect of trap assisted tunneling, TAT. The SiN x ARC films are also found to exhibit large position dependent stress-induced leakage current, SILC, that is a well-known TAT related phenomenon. TAT is therefore suggested as the leakage mechanism responsible for significant grain-to-grain differences in all properties disclosed in this study. SILC diminishes potential build-up on ARC surfaces and it is identified as a phenomenon decreasing PID susceptibility.