Abstract
We utilize a multiplexing architecture to measure the conductance properties of an array of 256 split gates. We investigate the reproducibility of the pinch off and one-dimensional definition voltage as a function of spatial location on two different cooldowns, and after illuminating the device. The reproducibility of both these properties on the two cooldowns is high, the result of the density of the two-dimensional electron gas returning to a similar state after thermal cycling. The spatial variation of the pinch-off voltage reduces after illumination; however, the variation of the one-dimensional definition voltage increases due to an anomalous feature in the center of the array. A technique which quantifies the homogeneity of split-gate properties across the array is developed which captures the experimentally observed trends. In addition, the one-dimensional definition voltage is used to probe the density of the wafer at each split gate in the array on a micron scale using a capacitive model.
Highlights
The split-gate transistor1 confines electron transport to one dimension (1D), giving rise to the quantization of conductance in units of 2e2/h.2,3 These devices are frequently used as part of more complicated integrated circuits, such as charge sensors,4 to readout electron spin states,5 as highly sensitive sensors for reflectometry measurements,6–8 and spin injectors.9,10 few studies on the yield and reproducibility of such devices have been undertaken, and often studies of device characteristics are based on the measurements of a single device.Systematic studies of the reproducibility of electrical properties of split-gate devices both from device-to-device, after thermal cycling, and following illumination11 are necessary in order to assess the suitability of split gates in large scale quantum circuitry
We investigate the reproducibility of the pinch off and one-dimensional definition voltage as a function of spatial location on two different cooldowns, and after illuminating the device
The spatial variation of the pinch-off voltage reduces after illumination; the variation of the onedimensional definition voltage increases due to an anomalous feature in the center of the array
Summary
The split-gate transistor confines electron transport to one dimension (1D), giving rise to the quantization of conductance in units of 2e2/h.2,3 These devices are frequently used as part of more complicated integrated circuits, such as charge sensors, to readout electron spin states, as highly sensitive sensors for reflectometry measurements, and spin injectors. few studies on the yield and reproducibility of such devices have been undertaken, and often studies of device characteristics are based on the measurements of a single device. The split-gate transistor confines electron transport to one dimension (1D), giving rise to the quantization of conductance in units of 2e2/h.2,3. These devices are frequently used as part of more complicated integrated circuits, such as charge sensors, to readout electron spin states, as highly sensitive sensors for reflectometry measurements, and spin injectors.. An on-chip multiplexing scheme has been used to study two aspects of scaling split gate devices: fabrication-limited and quantum yield and the statistical analysis of conductance characteristics including the 0.7 structure, a ubiquitous anomalous feature in 1D transport which occurs below the first plateau.
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