Spatial and Temporal Redundancy for Transient Fault-Tolerant Datapath

Abstract

In application specific integrated circuits used in aircraft control systems the effects of transient fault, both in temporal and spatial domain emanating from a single particle strike, cannot be ignored anymore. This is due to scaling of device geometry and surge in frequency. This paper presents novel fault-tolerant high-level synthesis methodology against temporal and spatial impacts of transient at reduced design cost (avg. ∼ 25%) and power (avg. ∼ 48%) than a recent approach.