Abstract

With the development of synthetic aperture radar (SAR) technologies in recent years, the huge amount of remote sensing data bring challenges for high-speed transmission and real-time processing. The general platform with GPU, CPU or digital signal processor (DSP) cannot meet the requirement for short delay and low power. Therefore, a field-programmable gate array-digital signal processor (FPGA-DSP) SAR imaging accelerate platform has become a solution for processing performance with a lower latency and power. In this study, an effective mapping strategy is adopted to the FPGA-DSP hybrid heterogeneous architecture to accelerate the processing performance according to the analysis of Chirp Scaling SAR imaging algorithms. As a proof of concept, a FPGA-DSP hybrid heterogeneous accelerating platform is designed and realised. The platform requires 12 s to focus a stripmap SAR raw data with a granularity of 16,384 × 16,384.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call