SPACE-CHARGE LAYERS AND SURFACE STATES IN p-TYPE CRYSTALLINE SILICON

Abstract

Pulse measurements on the silicon/electrolyte interface have been used to study space-charge layers and surface states on the (100) faces of p-type silicon. The techniques used enable both the creation and study of space-charge layers at the semiconductor surface, ranging from large-depletion to strong-accumulation conditions. They also permit a straightforward separation of the different components of the induced charge at the silicon/electrolyte interface, so as to yield the variation of both the free-electron density in the space-charge layer and the density of occupied surface states with barrier height. The measured space-charge characteristics are in very good agreement with theory. The data in strong-accumulation layers indicate the presence of an insulating buffer layer (such as an oxide), 3–4 monolayers thick. As to surface states, we find that for CP-4-etched silicon, a distribution of states exists ~ 0.34 eV above the valence-band edge, with total density ~ 6 × 1011 cm -2.