Source-Gated Transistors

Abstract

The source-gated transistor, SGT, is an inverted staggered thin film transistor, which has been engineered to have a barrier contact at the source, rather than the more conventional ohmic contact. Furthermore, the device geometry is designed so that current flow is barrier limited, and, in saturation, the height of this barrier is controlled by the gate voltage. As a result of these design features, the device has quite different behaviour from conventional TFTs. For example, it has a lower saturation voltage, higher output impedance, reduced short channel effects, and its current is insensitive to modest variations in the source-drain separation. The most readily formed barrier is with a Schottky contact, and these contacts have been used in SGTs fabricated in both a-Si:H and poly-Si. They have also been incorporated into the 2-D simulations of device operation, and, as a prelude to the discussion of the SGT, the operation of Schottky barrier diodes is reviewed. In addition to sections over-viewing the structure, operation and fabrication of SGTs, there is also a discussion of the differences in SGT and TFT characteristics. Finally, there is increasing recognition of the influence of the gate bias on the source barrier height in staggered organic TFTs, and analyses of the gate-source interaction in these devices are compared with the SGT analysis.