Source and drain formation in FinFETs

Abstract

This paper talks about the background and motivation of fin field-effect transistors (FinFETs) to address the short-channel effect and improve the performance of transistors. Also, this paper focuses on the manufacturing formation of source and drain in FinFETs, which is Self-Aligned Double Patterning (SADP) and discusses the challenges faced in fabrication and design, including self-heating effect and body punch-through in FinFET devices. Furthermore, this paper mentions the prospects of vision and design technology. The insight gained from this paper can enhance understanding of some parts of the manufacturing process in FinFETs and help improve fabrication technology.