Solutions for Wafer-Level Packaging of High Brightness LEDs

Abstract

High brightness LEDs (HB-LEDs) carry a high prospect for general lighting applications. Competing with the cost/performance ratio of current light sources demands an increase of the overall efficiency as well as the reduction of the device cost. Since packaging accounts for 30%–50% of the cost of HB LED manufacturing, moving from die- level to wafer-level processes is one likely potential solution for reducing cost per lumen. Silicon-based WLP, using the established processing technology of the MEMS and IC industry, offers high fabrication reliability, high yield and the direct integration of the driver IC in the package. The already small form factor of WLP can be further reduced using Through-Silicon-Vias (TSV), increasing the maximum amount of chips per wafer. Silicon WLP also offers superior thermal management, with the relatively high thermal conductance of silicon. Redistributing LED dies on silicon wafer submounts, with metal bonding and copper TSVs, further improves the heat conductance away from the active region of the chip, resulting in increased device performance. Wafer-level optics can further improve performance and reduce packaging costs. Wafer-level lens molding based on imprint lithography is in high volume manufacture for cell phone camera modules. It allows creation of spherical and a-spherical lenses as well as lens stacks with minimized form factor. In contrast to the currently applied drop dispensing technique for LED lens fabrication, the shape of the lens can be accurately tailored and the decrease of the lens size results in lower absorption and higher light output. Most of these technologies are already in high volume production in other sectors. We will discuss the field proven solutions at each process step, from the formation of the silicon interposer, through the chip-to-wafer bonding, to the final imprinting of the wafer-level optics.