SOI CMOS Technology

James B. Kuo,Ker-Wei Su

doi:10.1007/978-1-4757-2823-1_2

SOI CMOS Technology

James B. Kuo, Ker-Wei Su

https://doi.org/10.1007/978-1-4757-2823-1_2

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Publication Date: Jan 1, 1998

Citations: 5

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Abstract

In this chapter, SOI CMOS technology is described. Starting from the evolution of SOI technology, various SOI substrate and isolation techniques are introduced. Then, a 0.25μm SOI CMOS fabrication processing sequence is described, followed by major SOI CMOS device structures. In the final portion of this chapter, special-purpose SOI technologies including DRAM, BiCMOS, and power are described.

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