Software and Hardware Implementation of a Nine Level Inverter with Low Component Count

Abstract

This paper proposes a new single phase 9-level inverter topology for electrical loads like R-load and RL-load. The anticipated topology has been configured with only seven semiconductor power switches. A low frequency fundamental switching based Selective Harmonic Elimination(SHE) technique is utilized to reduce the switching losses of the semiconductor. Here, Genetic Algorithm(GA) is employed to determine optimal switching angles of anticipated 9-level Multi-Level Inverter(MLI) by solving the non-linear SHE equations. Here, MATLAB/Simulink software is employed to analyze the performance of the anticipated MLI topology. A real time prototype setup also has been implemented to validate the Simulink analysis. The hardware setup is tested at different loads to confirm that it works as a Voltage Source Inverter(VSI). Finally, the results are compared with available literature for reduction in component count.