Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture

Abstract

The decision feedback equalizer (DFE) is an efficient scheme to suppress intersymbol interference (ISI) in various communication and magnetic recording systems. However, most cost-effective DFE implementations suffer from the phenomenon of error propagation, which degrades its bit error rate (BER) performance. This paper proposes a soft-threshold-based multilayer DFE (STM-DFE) technique to reduce the BER. It involves very low hardware overhead costs as compared to the conventional DFE. When applied to a practical Lorentzian channel and channels of different eigenvalue spread, the STM algorithm even outperforms the Ideal DFE (IDFE) system (in the IDFE, symbols are correctly fed back without propagation errors). Simulation results show that the proposed scheme can efficiently reduce the burst error length (BEL) as well as BER. Additionally, the hardware overhead to implement the STM-DFE algorithm is negligible compared with the conventional DFE. By using the concepts of Shanbhag and Parhi and of Yang, Wu, and Lai, we also propose the pipelined STM-DFE (PSTM-DFE) architecture for high-speed communication/storage applications.