Soft Error Hardened FF Capable of Detecting Wide Error Pulse

Abstract

In the recent high-density and low-power VLSIs, occurrence of soft errors becomes significant problems. Recently, soft errors frequently occur on not only memory system but also circuits. Based on this standpoint, constructions of soft error tolerant FFs have been proposed. The FFs consist of some master and slave latches and C-elements. In the FFs, soft error pulses occurring on combinational parts of logic circuits are corrected as long as the width of the pulses is narrow, that is within a specified width. However, soft error pulses or other error pulses having wide width are neither detected nor corrected in the FFs. This paper presents a construction of another soft error tolerant FFs being added some latches and delay elements into the conventional soft error tolerant FFs. The proposed FFs have capability detecting error pulses having wide width as well as capability correcting those having narrow width. The proposed FFs are also capable of detecting hard errors. This paper also presents scan FFs facilitating delay fault testing and soft error tolerant FFs for two-rail logic circuit based on the proposed FFs. The evaluation shows that the area of the proposed FF is up to 66% larger than that of the conventional soft error tolerant FFs.