Smart AD and DA Conversion

Abstract

List of symbols and abbreviations. 1. INTRODUCTION. 2. AD AND DA CONVERSION. 1 Introduction. 2 Trends in applications. 3 Trends in technology. 4 Trends in system design. 5 Performance criteria. 6 Conclusion. 3. SMART CONVERSION. 1 Introduction. 2 Smart concept. 3 Application of the smart concept. 4 Focus in this work. 5 Conclusion. 4. SMART DA CONVERSION. 1 Introduction. 2 Area of current-steering DACs. 3 Correction of mismatch errors. 4 Sub-binary variable-radix DAC. 5 Design example. 6 Conclusion. 5. DESIGN OF A SUB-BINARY VARIABLE-RADIX DAC. 1 Schematic design. 2 Layout. 3 Self-measurement-circuit implementation. 4 Experimental results. 5 Conclusion. 6. SMART AD CONVERSION. 1 Introduction. 2 Literature review. 3 High-speed high-resolution AD conversion. 4 Smart calibration. 5 Conclusion. 7. DESIGN OF AN OPEN-LOOP T&H CIRCUIT. 1 Literature review. 2 Design goal. 3 T&H architecture. 4 Sampling core architecture. 5 Output buffer architecture. 6 T&H design. 7 Experimental results. 8 Conclusion. 8. T&H CALIBRATION. 1 Introduction. 2 T&H accuracy. 3 T&H calibration method. 4 Analog correction parameters. 5 Digitally assisted analog correction. 6 Simulation results. 7 Implementation of the calibration method and layout. 8 Experimental results. 9 Conclusion. 9. T&H CALIBRATION FOR TIME-INTERLEAVED ADCS. 1 Introduction. 2 Channel matching in time-interleaved T&H's. 3 Channel mismatch calibration. 4 Channel mismatch detection. 5 Channel mismatch correction. 6 Simulation results. 7 Implementation of the calibration method and layout. 8 Experimental results. 9 Conclusion. 10. CONCLUSIONS. References. Index.