Abstract

After more than four decades of semiconductor revolution led by CMOS technology, the ability to shrink transistors by 50% every 18 to 24 months is finally coming to an end. For years, the end of transistor scaling, otherwise known as the end of Moore's law, had been prematurely predicted. Case in point just as the industry thought that the fundamental optical wavelength limit would finally inhibit the progress of Moore's law, wet lithography came to the rescue; giving us 40nm and then 28nm logic process nodes. Now however, in order to get even smaller transistors, we are finding out we need to replace the age old planar bulk transistors with Finfet. The industry will also need to use more expensive and time consuming multi patterning techniques starting with double patterning at the 16nm node and quad patterning at 10nm and at 7nm; drastically increasing the mask cost. As a result, after taking into account the mask costs, we can no longer have the fantastic cost reductions of the past from device scaling. Therefore from an economic point of view, the beginning of the end of Moore's law is now upon us.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.