Abstract
A sliding mode control (SMC) strategy with dc capacitor voltage balancing is proposed for three-phase three-level T-type rectifiers. The proposed SMC strategy is designed in the abc frame rather than the dq frame. In this case, the necessity of three-phase current transformations is eliminated. The proposed SMC is based on the errors of the line currents. The amplitude of line current references is generated by controlling the dc voltage using a proportional-integral (PI) controller. In order to obtain unity power factor, the generated reference amplitude is multiplied by the corresponding sinusoidal waveform obtained from the phase locked loop (PLL) operating with grid voltages. The dc capacitor voltage balancing is achieved by adding a proportional control term into the line current reference obtained for each rectifier leg. The performance of the proposed control strategy is validated by simulations and experiments during steady-state, transients caused by load change, and unbalanced grid conditions. The results show that the proposed control strategy offers excellent steady-state and dynamic performances with low THD in the line currents, zero steady-state error in the output voltage, and very fast dynamic response.
Highlights
Three-phase ac-dc rectifiers are widely employed in various industrial applications due to their advantages such as controllable dc-link voltage, sinusoidal line currents with reasonably low total harmonic distortion (THD), and unity power factor
A sliding mode control (SMC) approach is presented for three-phase three-level Ttype rectifiers with capacitor voltage balancing control
The proposed SMC strategy is formulated in the abc frame rather than the dq frame
Summary
Three-phase ac-dc rectifiers are widely employed in various industrial applications due to their advantages such as controllable dc-link voltage, sinusoidal line currents with reasonably low total harmonic distortion (THD), and unity power factor. In order to achieve dc voltage control, sinusoidal line currents with low THD and unity power factor, the two-level rectifiers should be operated with high switching frequencies. This would increase acoustic noise and switching losses. Equation (11) implies that dc capacitor voltage error is influenced by the neutral-point current In. As explained in Introduction, there are three control objectives for three-level T-type rectifier. As explained in Introduction, there are three control objectives for three-level T-type rectifier These objectives are regulation of dc voltage (Vdc), control of line currents such that they are in phase with the corresponding grid voltages (achievement of unity power factor) and compensation of imbalance between dc capacitor voltages.
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