Abstract

Threshold voltage instability in 4H-SiC MOSFETs was investigated by means of combined cyclic gate bias stress measurements and single gate bias point measurements. This allowed to separate the contributions of interface states (N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</inf> ) and near interface oxide traps (NIOTs) in the nitridated deposited gate oxides. Nanoscale chemical analyses by electron energy loss spectroscopy allowed to correlate these trapping states to the presence of a sub-stoichiometric silicon oxide (~1 nm) and carbon-related defects (<1 nm) on different SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> /4H-SiC interfaces In particular, the sub-stoichiometric silicon oxide was correlated to the interface states and the carbon-related defects have been correlated to the NIOTs.

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