Single-Event Upsets in a 7-nm Bulk FinFET Technology With Analysis of Threshold Voltage Dependence

Abstract

In this work, single-event upset (SEU) responses of D flip-flop (FF) designs with different threshold-voltage options in a 7-nm bulk FinFET technology are examined. Experimental data imply that single-event (SE) cross section depends heavily on supply voltage and particle linear energy transfer (LET) values. For close-to-nominal supply voltages and low-LET particles, the SEU response differs very little between threshold-voltage options; however, for low supply voltages and high-LET particles, experimental data indicate that FFs are more susceptible to SEUs at higher threshold voltages. These results are consistent with schematic-level simulations run to estimate the effect of threshold voltage on SE transient (SET) pulsewidth (PW) and D-FF feedback-loop delay. Additional technology computer-aided design (TCAD) simulations show that SET current PWs for worst case strikes on an inverter are largely independent on threshold voltage at low LET values. All these results together suggest that the weak dependence of SEU response on threshold voltage is due to the FinFET structure and charge-collection mechanisms.