Single-Chip 60 GHz Transmitter and Receiver MMICs in a GaAs mHEMT Technology

Abstract

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15 mum, ~120 GHz fT/> 200 GHz fMAX GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs developed in our group. Compared to our first designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half of the DC power consumption. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (times8) LO chain, resulting in an IF center frequency of 2.5 GHz. The single chip TX MMIC consists of a balanced resistive mixer with an integrated ultra wideband IF balun, a three-stage amplifier and the times8 LO chain. The times8 is a multifunction design by itself consisting of a quadrupler, a feed back amplifier, a doubler, and a buffer amplifier. The TX chip delivers 4.1 plusmn 1.5 dBm over an RF frequency range of 56.5 to 64.5 GHz. The peak output power is 5.6 dBm measured at 60 GHz and the overall TX chip consumes 420 mW of DC power. The single chip RX MMIC contains a three-stage low noise amplifier, an image reject mixer with an integrated ultra wideband IF hybrid and the same times8 as used in the TX chip. The RX chip has more than 10.7 dB gain between 54.5 and 64.5 GHz and more than 13 dB of image rejection ratio between 57.5 and 67.5 GHz with a peak image rejection ratio of 22.5 dB at 64 GHz. The input referred third order intercept point, IIP3 is measured to -10 dBm at 60 GHz and the overall RX chip consumes 450 mW of DC power