Abstract
A single-channel CMOS preamplifier circuit was fabricated as a part of R&D efforts to design a 128-channel preamplifier chip for a silicon vertex detector of the BELLE collaboration. The prototype chip was evaluated in detail with special emphasis being placed on its analog circuit design and performance. An eight-stage digital/analog pipe-line, and a quadruple-correlated noise filter with a low-noise preamplifier circuit include key technologies for the design.
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