Single-phase parallel power processing scheme with power factor control

Abstract

With the enforcement of agency standards such as IEC-555-2 for the harmonic components of the input line current, conventional single phase AC to DC power converters with a rectifier-capacitor type input interface can no longer be used in switch-mode power supplies except for power levels below 75W. As a result, several alternative AC to DC converters, called Power Factor Corrected (PFC) converters, meeting the agency requirements have been proposed. Most of these achieve near sinusoidal input current irrespective of power levels. However, for lower power levels (<600W) IEC-555-2 does not require a sinusoidal input current. Realizing this, in this paper a parallel power processing scheme is proposed. Here, a conventional offline converter is paralleled with a PFC converter, resulting in less overall power handled and thus in improved efficiency. Excellent output dynamics are achieved by two control methods (Method 1 and Method 2). Method 1 proposes cancelling the second harmonic (100Hz) current component injected into the output capacitor by the PFC converter. The input harmonic performance was improved further in Method 2, which may be viewed as a modification of Method 1. SABER simulation using both the switched model and an averaged model are utilized to confirm the anticipated good performance of the proposed scheme.