Abstract

ABSTRACT This research illustrates a DC–DC buck converter with a pulse width modulation (PWM) feedback control loop and capable of power supply voltage range from VDD to 2.5× VDD, which is equivalent to 5–14 V. It is a single chip with area of 1.379 × 0.813 mm2 using 0.5 µm HV CMOS process, where high voltage (HV) MOSFETs, a Dead-time detector, a PWM feedback loop, a control circuit and HV driving transistors are included. The main feature of our design is its capability of shutting off an optimal number of power MOSFETs during light load operation, resulting in a very high conversion efficiency. Most important of all, the optimal solution is analytically proved. The light load efficiency is raised from 31.71% by traditional methods to 67.94% by the proposed design.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call