Simulation-based optimization of dispatching rules for semiconductor wafer fabrication system scheduling by the response surface methodology

Abstract

Scheduling of a semiconductor wafer fabrication system (SWFS) is complicated due to its re-entrant product flow, high uncertainties in operations, and rapidly changing products and technologies; thus dispatching rules have been widely used for real-time scheduling because they can provide a very quick and pretty good solution. However, deciding how to select appropriate rules is very difficult and seldom tackled. This paper describes an approach into the evaluation and optimization of dispatching rules by integrating the simulation and response surface methodology (RSM). In order to implement the proposed approach, a dynamic bottleneck dispatching (DBD) policy is designed, in which bottlenecks are detected in a timely way and adaptive dispatching decisions are made according to the real-time conditions. In addition, two case studies are carried out to demonstrate the approach. One case compares DBD to regular rules, such as CR + FIFO, EDD, SRPT, SPT, SPNB and Justice, a bottleneck dispatching method. Simulation results show that the DBD policy is superior to the other six methods. In another case study, the parameters of DBD are optimized by RSM and desirability function, and the result proves that the optimized DBD method can get even better performance.