Abstract
Voltage overscaling (VOS) is viewed as a useful approximate computing technique for image processing. This paper presents simulation-based evaluation for approximate adders using exact/inexact adder cells in image addition when subjected to VOS. The supply voltage of adder cells is scaled down below nominal voltage such that output delay increases beyond worst-case delay thereby generating errors in outputs. VOS is initially applied on exact full adder and inexact full adder (AMA1) at different technology nodes. Process variations (including gate length and input frequency) are then evaluated in terms of their effect on voltage overscaled adders. The 4 and 8-bits ripple carry adders (RCAs) using exact/AMA1 adder cells are exhaustively simulated at VOS process. Finally, VOS is applied into the addition between two images. The results show that AMA1 can sustain lower supply voltage operation (nearly 0.21v reduction) by consuming less energy (30% less), when compared with exact cell at the same number of errors. The error rate (ER) and normalized mean error distance (NMED) for AMA1-based RCA is significantly lower than exact full adder-based RCA. The PSNR for image addition by using AMA1 is higher than that using exact adder cell at VOS process.
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