Simulation Study of a Power MOSFET with Built-in Channel Diode for Enhanced Reverse Recovery Performance

Abstract

A new silicon power MOSFET architecture is proposed by introducing a built-in channel diode through a dummy MOS gate electrically coupled to the source. The oxide thickness of the channel diode is reduced to obtain a desired turn-ON voltage and attenuate the minority carrier injection from the PN junction body diode. Consequently, the proposed MOSFET is able to deliver superior reverse recovery characteristics, including reductions in reverse recovery charge ( $Q_{\sf RR}$ ) and peak reverse recovery current ( $I_{\mathrm{ RRM}}$ ) by a factor of ~4.2 and ~2.6, respectively. The breakdown voltage (232 V) of the proposed MOSFET is the same as the conventional MOSFET. The on-resistance of the proposed MOSFET (8.5 $\text{m}\Omega \cdot \text {cm}^{{2}}$ ) is only slightly increased compared with conventional MOSFET (8.0 $\text{m}\Omega \cdot \text {cm}^{{2}}$ ). The gate-to-drain charge ( $Q_{\sf GD}$ ) and gate charge ( ${Q} _{\mathsf {G}}$ ) are reduced by a factor of ~7.2 and ~3.9, respectively. Significantly improved figures of merit ( ${R} _{ON} \times {Q}_{\mathsf {G}}$ and ${R} _{ON} \times {Q}_{\mathsf {GD}}$ reduced by a factor of ~3.7 and ~6.8, respectively) are obtained in the proposed MOSFET. The device concept and characteristics are systematically analyzed with numerical TCAD simulations.