Simulation studies of a 2 Gb s−1 monolithic integrated smart pixel based on fabricated p-i-n PD, DHBT and a VCSEL

Abstract

A smart pixel that can function as a building block of an optical transceiver with circular dimensions is proposed using InGaP/GaAs double heterojunction bipolar transistors (DHBTs) and a GaAs/AlGaAs vertical cavity surface emitting laser (VCSEL). Fabricated DHBT showed a breakdown voltage of 13 V and a cut-off frequency of 35 GHz at Ic = 30 mA. Also a high-performance 850 nm infra-red VCSEL exhibited a threshold current of 3.5 mA with a maximum optical output of 4.8 mW at Ic = 20 mA and forward voltage of 1.8 V. The detector, comprised of the base-to-collector junction of the DHBT as a pin-PD, produced a photocurrent of 180 µA for a given input power of 0.3 mW. The extracted small-signal equivalent circuit parameters from measurement of these devices were used in PSPICE simulations to design an interface drive circuit for high-speed modulation. The overall OEIC circuit performance operates up to data rates of 2 Gb s−1 at 1 mW output power with maximum output voltage of 2 V across the VCSEL and modulation current of 5 mA.