Abstract
For discovering the principle of processing parameter combination for the stable growth and better wafer quality of Φ450 mm Czochralski grown silicon single crystal (shortly called Cz silicon crystal), the effects of crystal rotation rate and crucible one on the V/G ratio were simulated by using CGSim software. The results show that their effect laws on the V/G ratio for Φ450 mm Cz silicon crystal growth are some different from that for Φ200 mm Cz silicon one, and the effects of crucible rotation rate are relatively smaller than that of crystal one and its increasing only makes the demarcation point between two regions with different V/G ratio variations outward move along radial direction, and it promotes the wafer quality to weaken crystal rotation rate and strengthen crucible one.
Highlights
Since the 21th century, information industry has been quickly developing and the new generation of silicon wafer shows a trend of the biggest diameter of 450 mm, high uniformity and high detergency
It is shown in this figure that the effect laws of crystal rotation rate on V/G ratio are all same at the three crucible rotation rates, that is, when crystal rotation rate is less than 4 rpm, V/G ratio in the area near by crystal ingot axis increases and V/G ratio in the area far from crystal ingot axis decreases with speeding crystal rotation; when crystal rotation rate is larger than or equal to 4 rpm, V/G ratio monotonically decreases and the decreasing amplitude diminishes from inside to outside with accelerating crystal rotation, except for the side surface and its adjacent area
With crucible rotation rate increasing, the demarcation point of the two regions outward moves along radial direction, and V/G ratio decreases as the crystal rotation rate is less than 4 rpm and V/G ratio increases when the crystal one is greater than or equal to 4 rpm
Summary
Since the 21th century, information industry has been quickly developing and the new generation of silicon wafer shows a trend of the biggest diameter of 450 mm, high uniformity and high detergency. In 2008, an agreement for a pilot line of the new silicon wafer was entered into Intel Corp, Samsung Electronics, and TSMC [1] This goal has been postponed indefinitely due to the enormous input, and it is necessary to carry out the related simulation researches in advance. Liu [5] successfully established 2D model of small silicon crystal growth to simulate the evolution of interface shape with different crystal and crucible rotation rates. We carried out a 2D modeling for ĭ450 mm Cz silicon crystal ingot growth, and simulated the change law of V/G ratio at different combinations of crystal/crucible rates to demonstrate their optimal combination for improving the processing technology
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